Reading guide ： Recent years ,FPGA More and more fire . Microsoft has even said it wants to be in the data center , Use FPGA“ Instead of ”CPU.FPGA The full English name is Field Programmable Gate Array, Field programmable gate array . This article is for you to popularize science FPGA The general design process of .
author ： Wang Wenxiang Xing Jinzhang
source ： Huazhang technology
FPGA It's a special kind of integrated circuit , That means it First, an integrated circuit . Now the vast majority of integrated circuits are transistor integrated circuits , What people contact most in daily life is CMOS Transistor integrated circuits .
What is a transistor integrated circuit ？ Generally speaking , That is to use metal wires to connect many logic gates made of transistors 、 The memory cells are connected into a circuit , It has certain logic function .
however , When you design digital logic circuits , Have you ever done the experiment of connecting transistors with wires ？ Obviously not . We usually use a kind of Hardware description language （ such as VerilogHDL） Write the code , Then run the integrated software （ such as Vivado）, The circuit is designed .
This process is not unique to all kinds of course experiments , It's actually the same as what's common in industry today ASIC The design process is consistent .FPGA In general, the design process is 5 A step ：
- Circuit design .
- Code writing .
- Functional simulation .
- Comprehensive realization .
- Board debugging .
01 Circuit design
First , We need to make the circuit design plan according to the requirement specification . for example , The requirement is to design a MIPS CPU, We need to decompose this requirement step by step 、 elaboration , Get a circuit design that can meet the needs .
We're going to have to decide how many flow levels , Here are a few triggers , There's a couple of calculators , How do they connect , What is the state transition behavior of the whole circuit , wait .
Usually , We refined the circuit design to Register transfer level （Register Transfer Level,RTL） That's all right. , There's no need to be precise to the level of logic gates or transistors .
02 Code writing
The work of the code writing phase is to put the first 1 The circuit design scheme completed in step is Hardware description language （Hardware Description Language,HDL） Express it , Become a kind of EDA Forms that tools can understand .
03 Functional simulation
The work of the functional simulation phase is to carry out the research on the second phase 2 In the middle of the step HDL Language description of the design for functional simulation verification . So called function simulation verification , It is to check whether the logic function behavior of the circuit meets the original design requirements through software simulation .
Usually, we give the circuit the specified excitation , Observe whether the output of the circuit meets the expectation , If not, it indicates that the logic function of the circuit is wrong . This kind of mistake is either due to 1 There are mistakes in the circuit design of every step , Or the second 2 The code written in this step does not conform to the circuit design .
After finding the function error, you need to go back to the corresponding steps to correct it , Then follow the process step by step . So iterative , Until no more mistakes are found , You can go to the next stage .
It's important to point out that , Because our understanding of the circuit is RTL Hierarchical modeling , therefore The delay of the circuit is not considered in the functional simulation phase .
04 Comprehensive realization
The comprehensive implementation phase is completed from HDL Code to real chip circuit conversion process . This process is similar to the compiler's process of converting high-level language into binary code of the target machine .
This stage is divided into two sub stages: synthesis and implementation .
- Comprehensive stage take HDL The design described is compiled into a logical netlist connected by basic logical units , However, the netlist at this time is not the final gate level circuit netlist .
- Implementation phase Then the integrated logical net table will be mapped to FPGA The specific circuit in , That is, mapping the basic logical units in the logical netlist to FPGA On the hardware logic module inherent in the chip （ be called “ Layout ”）. And then , Layout Based Topology , utilize FPGA The connection resources inside the chip , Connect the mapped logic modules （ be called “ wiring ”）.
If there is no exception in the whole integrated implementation process ,EDA The tool will generate a bitstream （Bitstream） file . Generally speaking , This bitstream file describes the final circuit , But this file only has FPGA The chip can read .
05 Board debugging
It is said that ：“ The mule or the horse came out for a walk ”. No matter how accurate the functional simulation is , Ultimately, it depends on whether the actual circuit can work properly .
In the board debugging stage , First, download the bitstream file generated in the integrated implementation phase to FPGA In chip , Then run the circuit to see if it works properly , If something goes wrong, debug it 、 The cause of the positioning error .
To sum up , It's described above FPGA The general design process gives the general context , So that readers can first establish a correct overall concept .FPGA There are also many details in the design process , May refer to 《CPU Design practice 》 A Book .
About author ： Wang Wenxiang , Doctor of Engineering , Chief engineer of Loongson Zhongke Technology Co., Ltd , Post professor of Chinese Academy of Sciences . The main research direction is processor architecture design 、 Processor verification and computer system performance analysis and optimization , Participated in a number of countries “ Nuclear high base ”、863 and 973 project , He has published more than ten articles in various journals and conferences at home and abroad , Dozens of patents have been applied for , More than ten patents have been authorized .
Xing Jinzhang , He graduated from the Institute of computing technology, Chinese Academy of Sciences ,2015 Joined Loongson Zhongke Technology Co., Ltd , Engaged in the design of processor core structure , It's Loongson 、 One of the main structural designers of the evolution version of the processor core in the series . In recent years , actively participate in “ Dragon core Cup ” Technical support for the National College Students' computer system ability training competition 、 Training, etc .
This article is excerpted from 《CPU Design practice 》, Issued under the authority of the publisher .
Extended reading 《CPU Design practice 》
Recommended language ： In depth analysis of CPU The key link of design and development ; Start from scratch and gradually build a fully functional CPU; Comprehensive training CPU Engineering thinking and practical ability of design .